1. Field of the Invention
This invention is directed to a microprocessor having a single read only memory (ROM) which is masked to handle interrupts for two or more separate application programs so that the microprocessor may be used interchangably in different solid-state products.
2. Background Information
The development of microprocessors implemented by an integrated circuit, the "computer on a chip", has contributed greatly to the expansion of functions that can be performed by many products. Not only has the variety of functions of such products been expanded by these microprocessors, but the specific functions, or combinations of functions, can be tailored to the application. This versatility is realized through programming of the microprocessor. The program is stored in a nonvolatile memory. For large volume products, a read only memory (ROM) in which the program is permanently etched into the integrated circuit is used to store the program. A microprocessor which is programmed in this manner is referred to as a "masked microprocessor" in reference to the processing techniques by which the appropriate circuit configuration is established. While programmable memories can be used for storing programs which are likely to be modified, either from application to application or for enhancements, the ROMs of the masked microprocessor are much less costly when implemented in large numbers. On the other hand, the use of masked microprocessors in solid state products has always presented the risk that if programming bugs exist, or a change in the program is required, all instock processors have to be scrapped.
The microprocessor conventionally has available several interrupts which allow the program to leave a routine to perform a task with a higher priority and then to resume the original routine. These interrupts can be in response to internal signals such as from a timer, a counter, a reset module or an input/output device, or from external signals such as a signal from the operation of contacts or from a sensor. Typically, these interrupts are implemented by an interrupt vector table in memory which stores an address for branching to an appropriate interrupt service routine. The service routines are the sets of instructions to be carried out by the processor in response to the interrupts.
There remains a need for a mass produced multiple interrupt microprocessor with an inexpensive masked memory which does not have to be scrapped if there is an error in the program etched into the masked memory or if the program is later changed.